The manufacture of integrated circuit dies necessitates coping with various challenges, including challenges related to testing the manufactured circuit dies to ensure their proper operation. For example, once integrated circuit dies are incorporated into larger systems, for example into multi-chip devices, the testability of individual dies may be reduced due to limited access to integrated circuit die pins.
The description above is presented as a general overview of related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art against the present patent application.